sanjayraaman

Sanjay Raaman

@Sanjay Raaman

ABOUT ME

Aspiring Electrical Engineer with a strong foundation in engineering through internships at Schneider Electric, Big Bang Boom Solutions, and Mobiveil Inc. Contributed to reducing machine downtime by 20% and enhancing RF amplifier efficiency for defence applications. Developed a Python-based tool that improved PCB design accuracy by 30%. Eager to apply problem-solving skills and technical expertise to drive innovation and efficiency in engineering roles.

EDUCATION

Dec 2025

Master of Science, Electrical Engineering

University at Buffalo, The State University of New York

• GPA: 3.58
• Coursework: Microfabrication (Clean room), Analog and Digital Circuit Design, Signal Processing, Optoelectronics, Power Electronics, Sensors, VLSI Devices, Semiconductor Device Physics

May 2024

Bachelor of Technology, Electrical Engineering

Indian Institute of Technology, Palakkad

• Coursework: VLSI Design, Control Systems, Communication Systems, Digital Signal Processing, Electromagnetic Theory, RF & Microwave Engineering, Microelectronics, Embedded Systems

SKILLS

MATLAB / Simulink

LTSpice

Silvaco

Altium/KiCAD

MS Office

TCAD

ACADEMIC WORK AND PROJECTS

Mar 2025

Microfabrication Lab

University at Buffalo, The State University of New York


• Hands-on experience in cleanroom procedures and microfabrication processes such as photolithography, wet/dry etching, oxidation, doping and thin-film deposition (PVD, CVD, ALD).

• Operated vacuum systems, electron beam evaporators and sputtering tools; characterized materials using ellipsometry, profilometry, and four-point probe.

• Simulated semiconductor processes using TCAD tools for oxidation, ion implantation and annealing.

• Completed lab reports and technical documentation for nine fabrication modules including wet processing, lift-off and scanning electron microscopy (SEM) analysis.

Sep 2024

High-Precision Digital-to-Analog Converter (DAC) Design

University at Buffalo, The State University of New York


• Low-accuracy current mirrors in DACs caused output distortions affecting signal integrity.

• Designed and analyzed multiple current mirror topologies for improved accuracy.

• Simulated NMOS cascode and high-swing cascode current mirrors in Cadence, optimizing for impedance, voltage swing, and step size variations.

• Achieved an improvement in mirroring accuracy, reducing DAC output deviations.

Certifications

• NVIDIA DLI — Getting Started with AI on Jetson Nano: Set up Jetson Nano hardware and software, collected and annotated image data, trained deep learning models and deployed real-time inference for image classification and regression on embedded hardware.